Single crystalline silicon wafer, ingot, and producing method thereof

ABSTRACT

The present invention relates to a single crystalline silicon ingot, a single crystalline wafer, and a producing method thereof in accordance with the Czochralski method which enables reduction of a large defect area while increasing a micro-vacancy defect area in an agglomerated vacancy point area, which is the area between a central axis and an oxidation-induced stacking fault ring, by providing uniform conditions of crystal ingot growth and cooling and by adjusting a pulling rate for growing an ingot to grow, thus the oxidation-induced stacking fault ring exists only at an edge of the ingot radius.

BACKGROUND OF THE INVENTION

[0001] 1. Field of the Invention

[0002] The present invention relates to a single crystalline siliconingot, a single crystalline wafer, and a producing method in accordancewith the Czochralski method (hereinafter abbreviated the “Cz Method”),more particularly, to a single crystalline silicon ingot, a wafer and amethod of producing a single crystalline silicon ingot which enables alarge defect area to be reduced while increasing a micro-defect area inan agglomerated vacancy point area, which is the area between a centralaxis and an oxidation-induced stacking fault ring, by providing uniformconditions of crystal ingot growth and cooling and by adjusting apulling rate for growing an ingot, thus the oxidation-induced stackingfault, ring exists only at an edge of the ingot radius.

[0003] 2. Discussion of Related Art

[0004] A silicon wafer to fabricate electronic devices such as asemiconductor and the like is provided by thinly slicing a singlecrystalline silicon ingot. A well-known method of producing a singlecrystalline ingot for a wafer used for electronic devices such assemiconductor devices is that of Cz Method. The Cz Method makes acrystal grow by dipping a single crystalline seed crystal into moltensilicon and then pulling it slowly; this is explained in detail by“Silicon Processing for the VLSI Era”, Volume 1, Lattice Press (1986),Sunset Beach, Calif., by S. Wolf and R. N. Tauber. A general method forproducing a single crystalline silicon ingot by the Cz Method will beexplained in the following description in connection with the appendeddrawings.

[0005] First of all, a necking step of growing a thin and long crystalout of a seed crystal is carried out followed by a shouldering stepwhich is performed for growing the crystal radially to attain a targetdiameter. Then, a body growing step to obtain a crystal having apredetermined diameter is carried out. A part grown by the body-growingstep becomes a wafer. After the body growing step has been carried outto provide a wafer having a predetermined length, the body growing stepis terminated followed by a tailing step of separating the body from themolten silicon by which diameter is reduced gradually.

[0006] All these steps are carried out in a space called a “hot zone” ina grower of a crystal growing apparatus where the molten silicon growsto turn into a single crystalline ingot. The grower includes a melt-downsilicon instrument, a heater, a heat insulating body, and aningot-pulling apparatus.

[0007] As the defect characteristic inside an ingot depends on thesensitivity of the growing and cooling conditions of the crystal,efforts have been made to control the species and distributions ofcrystal growing defects by controlling the thermal environment near acrystal growing interface. The crystal growing defects are largelydivided into an agglomerated vacancy type defect and an interstitialtype defect. If the amount of vacancy type defects or interstitial typedefects exist more than equilibrium concentration, agglomeration iscommenced and then systematic defects in the crystal may be evolved.

[0008] The Voronkov theory, introduced in “The Mechanism of SwirlDefects Formation in Silicon,” Journal of Crystal Growth 59,625 (1982),by V. V. Voronkov, teaches that such defect formation is closely relatedto a value of V/G wherein V is a pulling rate of an ingot and G is atemperature gradient near the crystal growing interface. Based on theVoronkov theory, an agglomerated vacancy type defect occurs when thevalue of V/G exceeds a critical value, while an agglomeratedinterstitial type defect occurs when the value of V/G is lower than thecritical value. Therefore, the pulling rate has an influence on thespecies, sizes and density of the defects existing in the crystal when acrystal is grown according to given growing environment.

[0009]FIG. 1 and FIG. 2 show the defect characteristics of an ingotgrown by a related art. FIG. 1 shows a defect area which is generatedand grown along a length direction of an ingot by varying a pullingrate. The ingot is first grown by pulling up an upper part of thedrawing with high speed and then by gradually slowing down the pullingrate to grow a lower part. In other words, the lower part is grown by alow pulling rate and the upper part is grown by accelerating the pullingrate.

[0010] Referring to FIG. 1, an interstitial point defect area 11 isgenerated from a part grown with low speed, while a vacancy point defectarea 12 exists at an area generated with a high pulling rate. Anoxidation-induced stacking fault area 13, an area free of agglomeratedvacancy point defect 14 and an area free of agglomerated interstitialpoint defect 15 are sequentially arranged from the agglomerated vacancypoint defect area 12 between the agglomerated vacancy point defect area12 and the interstitial point defect area 11. The oxidation-inducedstacking fault area is pushed back to the peripheral edge by increasingthe pulling rate beyond a predetermined level, thereby distributing theagglomerated vacancy point defects throughout the entire cross-section.

[0011] On the other hand, the oxidation-induced stacking fault area isshrunken to the center of the cross-section and eliminated eventually asthe pulling rate is reduced, thereby generating the area free ofagglomerated vacancy point defects. As the pulling rate is furtherdecreased, an area free of agglomerated interstitial point defect isproduced. As the pulling rate is further reduced, the agglomeratedinterstitial point defect area 11 exists throughout the entirecross-section.

[0012] However, the method of producing an ingot according to therelated art is unable to provide uniform cooling conditions of axialtemperature gradient G in the radial direction of the ingot due toweakness of the hot zone during the growth of crystal. Specifically,heat at the center of the ingot is transferred to the edge of the ingotthrough conduction and then radiates therefrom, while the heat at theedge of the ingot is directly dissipated by radiation. Therefore,differences in the temperature gradient occur in the radial direction ofthe ingot.

[0013] Generally, the G value increases from the center of the ingot tothe edge radially. Thus, when the pulling rate at the center is same asthat around the edge, the V/G value at the center increases, causing asignificant increase in the agglomerated vacancy point defect. In suchcentral region, coarsely agglomerated vacancy point defects such asCrystal Originated Particle (“COP”) or Flow Pattern Defect (“FPD”)prevails.

[0014]FIG. 2 shows a horizontal cross-sectional view of an ingotbisected along the cutting line 11 in FIG. 1 to represent defectdistribution.

[0015] An Oxidation-induced Stacking Fault ring (“OiSF”) 13 a. islocated at an edge of an ingot which is pulled up with the pulling rateindicated as II in FIG. 1. The drawing shows a typical defectdistribution of a horizontal cross-section of a single crystal grown bythe Cz method by adjusting the ingot pulling rate to a high level.

[0016] As shown in FIG. 2, a coarsely agglomerated vacancy point defectarea 12 having coarsely agglomerated vacancy point defects exists at thecentral part of the ingot 10. An oxidation-induced stacking fault ring13 a exists at a location surrounding the coarsely agglomerated vacancypoint defect area 12. Further, an area free of an agglomerated vacancypoint defect area (vacancy dominating) 15 surrounds theoxidation-induced stacking fault ring 13 a. When the oxidation-inducedstacking fault ring 13 a is located at the circumferential part of theingot according to the related art, coarsely agglomerated vacancy pointdefects such as COP and FDP exist at the central part of the ingot.Thus, the ingot cannot be used as a substance for the production ofhighly-integrated semiconductor devices of micro Critical Dimension(“CD”).

[0017] Accordingly, the ingot according to the related art is unsuitablefor a wafer upon which micro electronic circuits are to be formed due tothe generation of coarsely agglomerated vacancy point defects as thepulling rate is increased for ingot growth. In addition, theproductivity of the related art is reduced when the pulling rate isdecreased in order to reduce the large defects. Moreover, the relatedart may generate interstitial defects larger than the large defects ofagglomerated vacancy point defect such as Large Dislocation Pit (“LDP”)on a cross-section of a wafer.

SUMMARY OF THE INVENTION

[0018] Accordingly, the present invention is directed to a singlecrystalline silicon ingot, a single crystalline wafer, and a method fortheir production in accordance with the Cz Method that substantiallyobviates one or more of the problems due to limitations anddisadvantages of the related art.

[0019] The object of the present invention is to provide a wafer whichenables productivity to be increased by increasing the pulling rate ofan ingot that may be used for the production of highly-integrateddevices of micro CD.

[0020] Additional features and advantages of the invention will be setforth in the description which follows and in part will be apparent fromthe description, or may be learned by practice of the invention. Theobjectives and other advantages of the invention will be realized andattained by the structure particularly pointed out in the writtendescription as well as the appended drawings.

[0021] To achieve these and other advantages and in accordance with thepurpose of the present invention, as embodied and broadly described, thepresent invention includes a single crystalline silicon wafer having afront face and a back face which are vertical to a central axis andproviding a circumferential part formed with the extended front and backfaces as well as a radius from the central axis. The wafer is a disktype, with an area free of agglomerated vacancy point defect less than10% of the radius from the wafer circumference to the central axis, anoxidation-induced stacking fault ring adjacent to the area free ofagglomerated vacancy point defect, and a micro-vacancy defect areahaving no defect as large as FPD but direct surface oxide defect(“DSOD”) from an inner edge of the oxidation-induced stacking fault ringto the central axis.

[0022] Preferably, the micro-vacancy defect area has a width greaterthan 10, 20 or 30% of the radius, and occupies an area from theoxidation-induced stacking fault ring to the central axis. It is alsopreferable that the micro-vacancy defect area and the oxidation-inducedstacking fault ring exist on the wafer only, a large defect area existsin the micro-vacancy defect area and includes COP defects over 0.08 μmwith the number equal to or less than 20, and initial oxygenconcentration of the wafer is under 12 ppma.

[0023] In another aspect, the present invention includes a singlecrystalline silicon ingot having a predetermined radius from a centralaxis, the ingot including a body having a predetermined length along thecentral axis, the ingot including an oxidation-induced lo stacking faultring as a coaxial type ring at a circumferential part relative to thecentral axis, and a micro-vacancy defect area just inside theoxidation-induced stacking fault ring in a direction toward the centralaxis, the micro-vacancy defect area having no FPD defect.

[0024] Preferably, the micro vacancy defect area has a width greaterthan 10, 20 or 30% of the radius, and the micro-vacancy defect areaoccupies an area from the oxidation-induced stacking fault ring to thecentral axis. It is also preferable that only the micro-vacancy defectarea and the oxidation-induced stacking fault ring exist on the wafer,the micro-vacancy defect area is equal to or longer than 10, 20, 30 or40% of the body length, and initial oxygen concentration of the ingot isunder 12 ppma.

[0025] In further aspects, the present invention includes a method ofproducing a single crystalline silicon ingot by the Cz Method whereinthe ingot has a predetermined radius from a central axis and includes abody having a predetermined length along the central axis. The methodcomprises the steps of reducing an axial temperature gradient of acircumferential part of the body by installing a heat shield to preventthe body of the ingot grown from a melt-down silicon from being cooleddown abruptly and by adjusting a melting gap between a lower part of theheat shield and a surface of the melt-down silicon; forming anoxidation-induced stacking fault ring as a coaxial-type ring at acircumferential part furthest from the central axis by controlling agrowth speed and maintaining a uniform overall axial temperaturegradient by making the axial temperature gradient of the central partsimilar to that of the circumferential part by increasing the axialtemperature gradient of the central part by reducing the temperature ofupper parts of the ingot and the heat shield; and forming amicro-vacancy defect area having no FPD defect but DSOD defect justinside the oxidation-induced stacking fault ring in a direction towardthe central axis.

[0026] Preferably, the micro-vacancy defect area has a width greaterthan 10, 20, 30 or 40% of the radius, and initial oxygen concentrationof the ingot is under 12 ppma.

[0027] It is to be understood that both the foregoing generaldescription and the following detailed description are exemplary andexplanatory and are intended to provide further explanation of theinvention as claimed.

BRIEF DESCRIPTION OF THE ATTACHED DRAWINGS

[0028] The accompanying drawings, which are included to provide afurther understanding of the invention and are incorporated in andconstitute a part of this application, illustrate embodiments of theinvention and together with the description serve to explain theprinciple of the invention.

[0029] In the drawings:

[0030]FIG. 1 shows a defect area which is generated and grown along alength direction of an ingot by varying a pulling rate according to arelated art;

[0031]FIG. 2 shows a horizontal cross-sectional view of an ingotbisected along the cutting line II in FIG. 1 to represent defectdistribution wherein the ingot is fabricated by adjusting a pulling rateto have an oxidation-induced stacking fault ring located at thecircumferential part of the crystalline ingot in a hot zone according toa related art;

[0032]FIG. 3 is a picture of XRT(X-ray topography) showing a verticalcross-section of an ingot that was subjected to a holding test in ageneral hot zone according to the related art;

[0033]FIG. 4 shows a cross-sectional view of an ingot bisected radiallywherein the ingot is fabricated by adjusting a pulling rate to have anoxidation-induced stacking fault ring located at the circumferentialpart of the crystalline ingot in a hot zone in which the coolingcondition is uniform in accordance with the present invention;

[0034]FIG. 5 schematically shows a hot zone near a growth interface;

[0035]FIG. 6 shows an XRT vertical cross-sectional view of an ingot thatwas subjected to a holding test in a hot zone in which radial growth andcooling conditions are uniform;

[0036]FIG. 7 shows a schematic view of an ingot bisected verticallywherein the ingot is grown by reducing a pulling rate in a hot zone inwhich the radial thermal condition is uniform;

[0037]FIG. 8 and FIG. 9 show radial distributions of FPD and DSOD areasin the 8-inch single crystal indicated as VIII and IX in FIG. 7,respectively;

[0038]FIG. 10 shows a heat treatment cycle applied to an ingot which isfor a 256 M DRAM device schematically;

[0039]FIG. 11 shows a graph of DZ depth of a wafer indicated as VIII andIX in FIG. 7;

[0040]FIG. 12 shows a graph of BMD density of a wafer indicated as VIIIand IX in FIG. 7;

[0041]FIG. 13 is a graph of the axial temperature gradient in a hot zonedemonstrating radial growth and cooling conditions of an ingot;

[0042]FIG. 14 shows a schematic view of an ingot bisected verticallywherein the ingot is grown by reducing a pulling rate in a hot zone inwhich the radial thermal condition is uniform;

[0043]FIG. 15 is a graph of FDP defect distribution measured atcross-section XV in FIG. 14 after heat-treating a wafer by the heattreatment cycle of FIG. 16; and

[0044]FIG. 16 is a graph of a heat treatment cycle according to thepresent invention.

DETAILED DESCRIPTION OF PREFERRED EMBODIMENTS

[0045] Reference will now be made in detail to the preferred embodimentsof the present invention, examples of which are illustrated in theaccompanying drawings.

[0046] The terminology's and abbreviations used in the specification areas follows.

[0047] Micro-vacancy defect Area: A semiconductor wafer needs to be freeof significant defects to secure the processes for forming variouselectronic circuits thereon as well as operation of the circuits asdesigned. To detect large defects causing malfunctions of the electroniccircuits on the semiconductor wafer itself, various ways were developedand named after the finders such as COP, FPD, LSTD, OiSF, DSOD and thelike, defined below. Micro-vacancy defect area is an area where DSOD maybe found but no operational malfunction occurs on electronic circuitsover 64M DRAM, and where COP, FPD, and LSTD are not found. In otherwords, a wafer, which may include DSOD, is suitable for producing ICover 64M DRAM provided that there is no COP, FPD and LSTD.

[0048] MCLT: Minority Carrier Life Time

[0049] COP: Crystal Originated Particle

[0050] FPD: Flow Pattern Defect

[0051] LSTD: Light Scattering Topography Defect

[0052] OiSF: Oxidation-induced Stacking Fault Ring

[0053] DSOD: Direct Surface Oxide Defect

[0054] BMD: Bulk Micro-Defect

[0055] DZ: Denuded Zone

[0056] XRT: X-Ray Topography

[0057] Generally, heat at the center of an ingot is transferred to thecircumferential part of the ingot through conduction and then radiatestherefrom, while the heat at the circumference is dissipated by directradiation. Therefore, difference of temperature gradient of axialtemperature gradients occurs in the radial direction of the ingot. Toreduce such a difference of temperature gradient, the axial temperaturegradient at the ingot circumference may be decreased or that at thecenter of the ingot may be increased.

[0058] In order to reduce the difference of the temperature gradient, aninterval, ie., a melting gap, between a heat shield bottom and amelt-down silicon is adjusted to control the quantity of heat radiatedfrom a heater to the circumferential ingot, thereby reducing the axialtemperature gradient of the ingot circumference. Additionally, the axialtemperature gradient of the central part of the ingot is increased bycooling down upper parts of the ingot and the heat shield.

[0059]FIG. 5 schematically shows a hot zone near a growth interface.Referring to FIG. 5, the difference in cooling speeds of the respectiveradial locations is lessened by reducing the cooling speed of the ingotcircumference by controlling radiation heat from a melt-down silicon 52melted in a quartz crucible 56 supported by a crucible support 57 orwith a heater 51 using a heat shield 54. In this case, the heat shield54 is made of a thermally-insulating substance so as not to transferheat from the melt-down silicon 52 to the upper part of the ingot 53.

[0060] The cooling speed of the ingot circumference near the interfaceis decreased by preventing the heat from being easily leaked through themelting gap, that is, a space 55 between a bottom of the heat shield 54and a surface of the melt-down silicon 52. Moreover, the coolingcondition is controlled by varying a surface size of the ingot 53 andthe radiating heat from the heater 51 by adjusting the height of themelting gap 55.

[0061] Uniformity of cooling conditions in the radial direction of theingot can be verified by a holding test described in “Grown-inMicrodefects, Residual Vacancies and Oxygen Precipitation Bands inCzochralski Silicon”, Journal of Crystal Growth 204, 462 (1999), by V. VVoronkov and R. Falster, which describes that specific oxygenprecipitation patterns appear in an ingot crystal that was subjected tothe holding test.

[0062] An XRT image of a vertical cross-section of a crystalline ingotthat was subjected to the holding test at a general hot zone is shown inFIG. 3. The bright region 31 is an oxygen precipitation enhanced region,and a void nucleus generated region 33 exists above the oxygenprecipitation enhanced region 31. Such region appears to the portion ofthe ingot on which temperature reaches about 1070° C. during the holdingtest.

[0063]FIG. 6 shows an XRT vertical cross-sectional view of an ingot thatwas subjected to a holding test in a hot zone in which radial growth andcooling conditions are uniform. Compared to the vertical cross-sectionalview in FIG. 3, FIG. 6 shows that the boundary between the oxygenprecipitation region 61 and the void nucleus generating region 63 isformed in parallel to the radial direction of an ingot, therebyindirectly indicating that the point defect concentration and coolingspeed in the crystal are radially uniform.

[0064]FIG. 4 shows a schematic radial defect distribution of an ingotgrown in a hot zone in which crystal growth and cooling conditions areradially uniform. Once defect distribution of a wafer, which is made bycutting a single crystalline ingot grown under hot zone conditions suchthat thermal history difference to the radial direction of an ingot isminimized and that a vacancy area exists through the entire ingot, isinspected, as shown in FIG. 4, coarsely agglomerated vacancy pointdefects such as COP or FPD exist with low density on the central part 41and a micro-vacancy defect area 42 surrounds it. Successively, anoxidation-induced stacking fault ring 43 and an area free ofagglomerated vacancy point defect 44 provide thin layers surrounding themicro-vacancy defect area 42. In this example, the area free ofagglomerated vacancy point defect 44 is formed to a width narrower than10% of the radius.

[0065] The outstanding difference of using the inventive method from thecross-section of the ingot grown according to the related art, as shownin FIG. 2, is that the large defects such as COP and FPD are confinedwithin a central part surrounded by the micro-vacancy defect area 42.

[0066] According to the present invention, the micro vacancy defect areahas no FPD but may have DSOD, while the coarsely agglomerated vacancypoint defect area indicates that FPD is distributed thereon. As alreadydefined, the size of DSOD defect is substantially smaller than that ofFPD near the wafer surface. As the integration of a chip increases, CDof a device decreases abruptly. It is known that a wafer used for a VLSIdevice over 64 or 128 MB permits no FPD, but can tolerate DSOD.

[0067] Embodiment 1

[0068] A heat shield designed to provide a uniform cooling conditionradially around a growth interface in a crystal cuts off heat from amelt-down silicon and allows the crystal to easily cool down, while alsoslowing down the cooling of temperature at a surface of the crystalbetween the heat shield and the melt-down silicon surface, therebyeventually reducing the difference of cooling speeds between the surfaceand inner part of the crystal, simultaneously.

[0069] The radial uniformity of vertical cooling speed is improved byadjusting the melting gap, and the result of the holding test performedto verify the uniformity has been described as shown in FIG. 6.

[0070] While controlling the vertical cooling speed uniformly in theradial direction, the pulling rate of an ingot is taken fast initiallyand then taken slowly to complete the ingot. In this case, the oxygenconcentration is adjusted between 8 and 12 ppma depending on the flow ofambient gas and the rotation speed of the quartz crucible.

[0071]FIG. 7 represents the result of defect distribution of an 8-inchsingle crystalline silicon ingot which is grown by the above method andbisected vertically. The defect distribution along with the cuttinglines VIII and IX in FIG. 7 are shown in FIGS. 8 and 9, respectively.

[0072] As shown in FIG. 7, an agglomerated vacancy point defect area 71dominates at a part where the ingot was grown with a high pulling rate.Yet, a micro-vacancy defect area 72 increases when the pulling rate isreduced. An oxidation-induced stacking fault area 73 increases as soonas the agglomerated vacancy point defect area 71 decreases, providedthat the pulling rate is reduced below a predetermined level. When thepulling rate is reduced even more, the oxidation-induced stacking faultarea starts to move from the ingot circumference to the central axis toform an area free of agglomerated vacancy point defect 74 at thecircumference such that the width of theagglomerate-intrinsic-point-defect free area 74 increases. Theagglomerate-intrinsic-point-defect free area may be divided into an areafree of agglomerated vacancy point defect 74 and an area free ofinterstitial point defect 75. When the pulling rate is further reduced,an interstitial point defect area 76 is generated.

[0073]FIG. 8 and FIG. 9 illustrate the defect distribution. As shown inthe drawings, a micro-vacancy defect area exists between theoxidation-induced stacking fault area 73 and the dotted line in thevacancy point defect area, shown in FIG. 7. FIGS. 8 and 9 furtherinclude test results of distribution of FPD defects using chemicaletching of wafers cut along the lines VIII and IX, respectively.

[0074] As shown in the drawings, an area free of agglomerated vacancypoint defect 44 (referring to FIG. 4) in which the width is less than10% of a radius, is located from a wafer circumference to a centralaxis, and an oxidation-induced stacking fault ring 43 adjacent to thearea 44 exists successively. Distributed at the wafer circumference, theoxidation-induced stacking fault area in FIG. 8 occupies a region widerthan that in FIG. 9 due to the difference of the pulling rate. A DSODregion having micro-vacancy defects exists from the center to anoxidation-induced stacking fault ring, while an FPD area having largedefects exists only in the central part, thereby providing evidence thatthe micro vacancy defect area actually exists thereon.

[0075] As the thermal history uniformity is increased in the radialdirection, the micro-vacancy defect area is proportionally extended tothe center of the wafer, thereby eventually eliminating the large defectarea. Thus, the inner part of the oxidation-induced stacking fault ringbecomes the micro-vacancy defect area.

[0076]FIG. 10 illustrates the heat treatment cycle used during a 256MDRAM device production. The graph shows a heat treatment cycle byhearting up to 1000° C. for 30 minutes, then increasing the temperatureup to 1150° C. for 60 minutes, cooling down to 780° C., followed byheating up to 1000° C. for 16 hours, and cooling down.

[0077] For a good quality wafer, Bulk Micro-Defect (“BMD”) of highdensity under the surface of a wafer in a predetermined depth isrequired for the production of circuits on the wafer, which enablesremoval of metal contaminants. FIG. 11 shows a graph of Denuded Zone(“DZ”) depth of a wafer indicated as VIII and IX in FIG. 7. The DZ is adistance from a wafer surface to a BMD area. FIG. 12 shows a graph ofBMD density of a wafer indicated as VIII and IX in FIG. 7.

[0078] Referring to FIG. 11 and FIG. 12, a BMD density and a DZ depthare attained relatively uniformly in the radial direction. After theheat treatment cycle in FIG. 10 has been applied, it is found that theoxidation-induced stacking fault area actually has no oxidation-inducedstacking faults. An initial oxygen concentration of the used wafer isunder 12 ppma. Once an entire ingot body is grown under the surroundingconditions and using the pulling rate shown at the cutting lines VIIIand IX in FIG. 7 and with the use of the above result, an ingot havingthe defect distributions shown in FIG. 8 and FIG. 9 is attained.

[0079] In addition, if the uniformity of the axial temperature isadjusted well, it is possible to grow an ingot able to provide a waferwhich has neither COP nor FPD and has micro-vacancy defects distributedonly from an inner diameter of the oxidation-induced stacking fault ringto a central axis of the ingot.

[0080] Embodiment 2

[0081] In order to achieve uniform crystal growth and cooling conditionsradially, an axial temperature gradient at an ingot circumference isreduced by controlling the heat radiated from a heater to an ingotcircumference in a manner that the gap between a heat shield bottom anda melt-down silicon is adjusted and upper parts of the ingot and heatshield are cooled down, thereby increasing the axial temperaturegradient at the central part of the ingot. Thus, a radial Gr/Gc becomesa curve as shown in FIG. 13 and an ingot is grown in accordance with theaxial temperature figures of Table 1. TABLE 1 Items ConventionalImproved ΔG (K/cm) 16.49 2.87 G_(1,c) (K/cm) 13.29 32.31 G_(1,e) (K/cm)11.25 43.55 G_(2,c) (K/cm) 10.94 23.81 G_(2,e) (K/cm) 9.94 26.14

[0082] An axial temperature gradient 132 from the ingot center to thecircumference under the ambient conditions of the embodiment of thepresent invention, as shown in FIG. 13, is more uniform than theconventional temperature gradient 131 of the related art.

[0083] Table 1 shows axial temperature gradient numerals of thermalconditions shown at FIG. 13, wherein ΔG=Ge−Gc (K/cm) (ΔG is a differencebetween axial temperature gradients of an ingot circumference and aningot center adjacent to an interface of the melt-down silicon). G1 isan average value of an interval where COP is generated between 1120° C.and 1070° C., G2 is an average value of an interval where OiSF nucleiare generated between 1070° C. and 800° C., and subscripts ‘c’, ‘e’ and‘r’ (shown in FIG. 13) are a central part, circumference and arbitraryradius of an ingot, respectively. ΔG should be equal to or less than 3K/cm.

[0084] As shown in Table 1, ΔG of the related art is 16.49 K/cm, whileΔG of the present invention is 2.87 K/cm. In the embodiment of thepresent invention, ΔG is maintained under 3 K/cm. Average values, whichare greater than those of the related art, of axial temperature gradientof the ingot center and the ingot circumference between the interval1120° C. to 1070° C. where COP is mainly generated are 32.31 K/cm and43.55 K/cm, respectively. And, average values, which are much greaterthan those of the related art, of axial temperature gradient of theingot center and the ingot circumference between an interval 1070° C. to800° C. where OiSF nuclei are mainly generated are 23.81 K/cm and 26.14K/cm, respectively. Therefore, the temperature interval during which thedefects are generated passes so quickly that the defects have lesschance to be generated.

[0085]FIG. 14 shows a schematic view of a cross-section of an ingotbisected vertically wherein the ingot is grown by reducing a pullingrate in a hot zone in which the radial thermal condition is uniform,wherein the pulling rate is reduced from 0.65 mm/min. to 0.48 mm/min andthe cross-section is located 360 mm from a shoulder of the ingot. Inaddition, FIG. 14 shows a vertical cross-section of a single crystallinesilicon ingot being matched with a pulling rate according to anembodiment of the present invention, wherein an image is attained bycarrying out thermal treatment on the cross-section of the ingot grownby reducing the pulling rate from 0.65 mm/min. to 0.48 mm/min., alongthe cycle in FIG. 16, and then by scanning the cross-section with aMinority Carrier Scan of the Minority Carrier Life Time (“MCLT”). Asshown in FIG. 14, it is desirable to set the pulling rate over 0.55mm/min.

[0086] As shown in FIG. 15, when the wafer bisected along the cuttingline XV is inspected to find defects after a heat treatment such as theheat treatment cycle in FIG. 16, FPD under 250 ea./cm² are found at apart, with most of the defects being in the central part. In this case,the wafer is provided by cutting the body 240 mm from the shoulder.

[0087]FIG. 16 is a graph of a heat treatment cycle carried out byheating up to 800° C. at a rate of 5° C./min., maintaining that statefor 4 hours, heating up to 1000° C., maintaining that state for a periodof time, preferably 16 to 20 hours, and cooling down at a rate of 3°C./min. Accordingly, compared to the ingot grown according to therelated art, a single crystalline ingot fabricated by theabove-mentioned method enables the pulling rate to be increased withsize and density of crystalline defect being reduced, thereby improvingproductivity and wafer quality without increasing product-cost.

[0088] It will be apparent to those skilled in the art that variousmodifications and variations can be made in a single crystalline siliconingot, a single crystalline wafer, and a producing method thereof of thepresent invention without departing from the spirit or scope of theinventions. Thus, it is intended that the present invention cover themodifications and variations of this invention provided they come withinthe scope of the appended claims and equivalents.

What is claimed is:
 1. A single crystalline silicon wafer having a frontface and a back face which are vertical to a central axis and providinga circumferential part formed with the extended front and back faces aswell as a radius from the central axis, the wafer being a disk type,wherein said wafer having an area free of agglomerated vacancy pointdefect less than 10% of the radius from the wafer circumference to thecentral axis, an oxidation-induced stacking fault ring adjacent to thearea free of agglomerated vacancy point defect, and a micro-vacancydefect area having no defect as large as FPD, with DSOD existing from aninner edge of the oxidation-induced stacking fault ring to the centralaxis.
 2. The single crystalline silicon wafer according to claim 1,wherein the micro-vacancy defect area has a width greater than 10% ofthe radius of the wafer.
 3. The single crystalline silicon waferaccording to claim 1, wherein the micro-vacancy defect area has a widthgreater than 20% of the radius of the wafer.
 4. The single crystallinesilicon wafer according to claim 1, wherein the micro-vacancy defectarea has a width greater than 30% of the radius of the wafer.
 5. Thesingle crystalline silicon wafer according to claim 1, wherein themicro-vacancy defect area occupies an area from the oxidation-inducedstacking fault ring to the central axis.
 6. The single crystallinesilicon wafer according to claim 1, wherein a large defect area existsin a central portion of the micro-vacancy defect area and includes COPdefects over 0.08 μm with the number equal to or less than
 20. 7. Thesingle crystalline silicon wafer according to claim 1, wherein initialoxygen concentration of the wafer is less than 12 ppma.
 8. The singlecrystalline silicon wafer according to claim 1, wherein initial oxygenconcentration of the wafer is less than 8 ppma.
 9. A single crystallinesilicon ingot having a predetermined radius from a central axis, theingot including a body having a predetermined length along the centralaxis, the ingot including: an oxidation-induced stacking fault ring as acoaxial-type ring at a circumferential part relative to the centralaxis; and a micro-defect area just inside the oxidation-induced stackingfault ring in a direction toward the central axis, the micro-vacancydefect area having no FPD defect.
 10. The single crystalline siliconingot according to claim 9, wherein the micro-vacancy defect area has awidth greater than 10% of the radius.
 11. The single crystalline siliconingot according to claim 9, wherein the micro-vacancy defect area has awidth greater than 20% of the radius.
 12. The single crystalline siliconingot according to claim 9, wherein the micro-vacancy defect area has awidth greater than 30% of the radius.
 13. The single crystalline siliconingot according to claim 9, wherein the micro-vacancy defect areaoccupies an area from the oxidation-induced stacking fault ring to thecentral axis.
 14. The single crystalline silicon ingot according toclaim 9, wherein the micro-vacancy defect area is equal to or longerthan 10% of the body length.
 15. The single crystalline silicon ingotaccording to claim 9, wherein the micro-vacancy defect area is equal toor longer than 20% of the body length.
 16. The single crystallinesilicon ingot according to claim 9, wherein the micro-vacancy defectarea is equal to or longer than 30% of the body length.
 17. The singlecrystalline silicon ingot according to claim 9, wherein themicro-vacancy defect area is equal to or longer than 40% of the bodylength.
 18. The single crystalline silicon ingot according to claim 9,wherein initial oxygen concentration of the ingot is under 12 ppma. 19.The single crystalline silicon ingot according to claim 9, whereininitial oxygen concentration of the ingot is under 8 ppma.
 20. A methodof producing a single crystalline silicon ingot by a Czochralski Methodwherein the ingot has a predetermined radius from a central axis andincludes a body having a predetermined length along the central axis,the method comprising the steps of: reducing an axial temperaturegradient of a circumferential part of the body by installing a heatshield to prevent the body of the ingot grown from a melt-down siliconfrom being cooled down abruptly and by adjusting a melting gap between alower part of the heat shield and a surface of the melt-down silicon;forming an oxidation-induced stacking fault ring as a coaxial-type ringat a circumferential part furthest from the central axis by controllinga growth speed and maintaining a uniform overall axial temperaturegradient by making the axial temperature gradient of a central partsimilar to that of the circumferential part by increasing the axialtemperature gradient of the central part by reducing temperature ofupper parts of the ingot and the heat shield; and forming amicro-vacancy defect area having no FPD just inside theoxidation-induced stacking fault ring in a direction toward the centralaxis.
 21. The method of producing a single crystalline silicon ingotaccording to claim 20, wherein the micro-vacancy defect area has a widthgreater than 10% of the radius.
 22. The method of producing a singlecrystalline silicon ingot according to claim 20, wherein themicro-vacancy defect area has a width greater than 20% of the radius.23. The method of producing a single crystalline silicon ingot accordingto claim 20, wherein the micro-vacancy defect area has a width greaterthan 30% of the radius.
 24. The method of producing a single crystallinesilicon ingot according to claim 20, wherein the micro-vacancy defectarea occupies an area from the oxidation-induced stacking fault ring tothe central axis.
 25. The method of producing a single crystallinesilicon ingot according to claim 20, wherein the micro-vacancy defectarea is equal to or longer than 10% of the body length.
 26. The methodof producing a single crystalline silicon ingot according to claim 20,wherein the micro-vacancy defect area is equal to or longer than 20% ofthe body length.
 27. The method of producing a single crystallinesilicon ingot according to claim 20, wherein the micro-vacancy defectarea is equal to or longer than 30% of the body length.
 28. The methodof producing a single crystalline silicon ingot according to claim 20,wherein the micro-vacancy defect area is equal to or longer than 40% ofthe body length.
 29. The method of producing a single crystallinesilicon ingot according to claim 20, wherein initial oxygenconcentration of the ingot is under 12 ppma.
 30. The method of producinga single crystalline silicon ingot according to claim 20, whereininitial oxygen concentration of the ingot is under 8 ppma.
 31. Themethod of producing a single crystalline silicon ingot according toclaim 20, wherein an average value of the axial temperature gradient atthe central part is equal to or greater than 30 K/cm and an averagevalue of the axial temperature gradient at the circumferential part isequal to or greater than 40 K/cm when temperature of the ingot rangesfrom 1120° C. to 1070° C.
 32. The method of producing a singlecrystalline silicon ingot according to claim 20, wherein an averagevalue of the axial temperature gradient at the central part is equal toor greater than 20 K/cm and an average value of the axial temperaturegradient at the circumferential part is equal to or greater than 23 K/cmwhen temperature of the ingot ranges from 1070° C. to 800° C.